Sciweavers

681 search results - page 134 / 137
» Hardware Synthesis Using SAFL and Application to Processor D...
Sort
View
SPAA
2006
ACM
15 years 5 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
FP
1989
124views Formal Methods» more  FP 1989»
15 years 3 months ago
Deriving the Fast Fourier Algorithm by Calculation
This paper reports an explanation of an intricate algorithm in the terms of a potentially mechanisable rigorous-development method. It uses notations and techniques of Sheeran 1] ...
Geraint Jones
ADBIS
1995
Springer
155views Database» more  ADBIS 1995»
15 years 3 months ago
The MaStA I/O Cost Model and its Validation Strategy
Crash recovery in database systems aims to provide an acceptable level of protection from failure at a given engineering cost. A large number of recovery mechanisms are known, and...
S. Scheuerl, Richard C. H. Connor, Ronald Morrison...
CODES
2007
IEEE
15 years 6 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
MOBISYS
2008
ACM
15 years 11 months ago
Trustworthy and personalized computing on public kiosks
Many people desire ubiquitous access to their personal computing environments. We present a system in which a user leverages a personal mobile device to establish trust in a publi...
Scott Garriss, Ramón Cáceres, Stefan...