Sciweavers

681 search results - page 17 / 137
» Hardware Synthesis Using SAFL and Application to Processor D...
Sort
View
COMPSEC
2008
116views more  COMPSEC 2008»
14 years 9 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
15 years 3 months ago
ASIP architecture for multi-standard wireless terminals
This paper presents the Block Processing Engine (BPE), an Application Specific Instruction-Set Processor (ASIP) explicitly designed for the implementation of multistandard wireles...
Daniele Lo Iacono, J. Zory, Ettore Messina, N. Pia...
ASPLOS
2011
ACM
14 years 1 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
ISMVL
1999
IEEE
72views Hardware» more  ISMVL 1999»
15 years 1 months ago
Information Relationships and Measures in Application to Logic Design
In this paper, the theory of information relationships and relationship measures is considered and its application to logic design is discussed. This theory makes operational the ...
Lech Józwiak
ISLPED
2009
ACM
125views Hardware» more  ISLPED 2009»
15 years 4 months ago
Behavior-level observability don't-cares and application to low-power behavioral synthesis
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
Jason Cong, Bin Liu, Zhiru Zhang