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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 1 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
ISSS
1995
IEEE
116views Hardware» more  ISSS 1995»
15 years 1 months ago
The Chinook hardware/software co-synthesis system
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
Pai H. Chou, Ross B. Ortega, Gaetano Borriello
VLSID
2002
IEEE
174views VLSI» more  VLSID 2002»
15 years 10 months ago
Architecture Implementation Using the Machine Description Language LISA
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, ...
CASES
2005
ACM
14 years 11 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan