681 search results - page 28 / 137 » Hardware Synthesis Using SAFL and Application to Processor D... |
IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
FPL
2009
Springer
15 years 1 months ago
2009
Springer
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...