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67
Voted
ICCD
2008
IEEE
124views Hardware» more  ICCD 2008»
15 years 6 months ago
Global bus route optimization with application to microarchitectural design exploration
— Circuit and processor designs will continue to increase in complexity for the foreseeable future. With these increasing sizes comes the use of wide buses to move large amounts ...
Dae Hyun Kim, Sung Kyu Lim
62
Voted
DATE
2009
IEEE
81views Hardware» more  DATE 2009»
15 years 4 months ago
ReSim, a trace-driven, reconfigurable ILP processor simulator
— Modern processors are becoming more complex and as features and application size increase, their evaluation is becoming more time-consuming. To date, design space exploration r...
Sotiria Fytraki, Dionisios N. Pnevmatikatos
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 2 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
DAC
1998
ACM
15 years 10 months ago
Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data
Statistical analysis of bug discovery data is used in the software industry to check the quality of the testing process and estimate the reliability of the tested program. In this...
Yossi Malka, Avi Ziv
FPL
2004
Springer
119views Hardware» more  FPL 2004»
15 years 1 months ago
Reconfigurable Instruction Set Extension for Enabling ECC on an 8-Bit Processor
Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is...
Sandeep S. Kumar, Christof Paar