681 search results - page 50 / 137 » Hardware Synthesis Using SAFL and Application to Processor D... |
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
76
Voted
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
78
Voted
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
CASES
2008
ACM
14 years 11 months ago
2008
ACM
While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction set...