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ERSA
2006
197views Hardware» more  ERSA 2006»
14 years 11 months ago
A High Speed, Run Time Reconfigurable Image Acquisition processor for a Missile Approach Warning System
High frame rate video capture and image processing is an important capability for applications in defense and homeland security where incoming missiles must be detected in very sh...
Vinay Sriram, David Kearney
DAC
2009
ACM
15 years 10 months ago
Non-intrusive dynamic application profiling for multitasked applications
Application profiling ? the process of monitoring an application to determine the frequency of execution within specific regions ? is an essential step within the design process f...
Karthik Shankar, Roman L. Lysecky
CODES
2007
IEEE
15 years 4 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
ARC
2008
Springer
95views Hardware» more  ARC 2008»
14 years 11 months ago
The Instruction-Set Extension Problem: A Survey
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
Carlo Galuzzi, Koen Bertels
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler