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IOPADS
1996
100views more  IOPADS 1996»
14 years 11 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
96
Voted
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 3 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
DAC
2007
ACM
15 years 10 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
ASAP
2010
IEEE
315views Hardware» more  ASAP 2010»
14 years 7 months ago
A compact FPGA-based architecture for elliptic curve cryptography over prime fields
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, S...
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
15 years 2 months ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...