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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 1 months ago
Mixed-clock issue queue design for energy aware, high-performance cores
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
Venkata Syam P. Rapaka, Emil Talpes, Diana Marcule...
JPDC
2006
111views more  JPDC 2006»
14 years 9 months ago
Designing irregular parallel algorithms with mutual exclusion and lock-free protocols
Irregular parallel algorithms pose a significant challenge for achieving high performance because of the difficulty predicting memory access patterns or execution paths. Within an...
Guojing Cong, David A. Bader
86
Voted
ASPLOS
2010
ACM
15 years 4 months ago
Speculative parallelization using software multi-threaded transactions
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B....
109
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SIGMETRICS
1995
ACM
144views Hardware» more  SIGMETRICS 1995»
15 years 1 months ago
On Characterizing Bandwidth Requirements of Parallel Applications
Synthesizing architectural requirements from an application viewpoint can help in making important architectural design decisions towards building large scale parallel machines. I...
Anand Sivasubramaniam, Aman Singla, Umakishore Ram...
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
14 years 7 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar