339 search results - page 21 / 68 » Hardware Synthesis for Multi-Dimensional Time |
ISSS
1997
IEEE
15 years 4 months ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
98
Voted
ASPDAC
1995
ACM
15 years 4 months ago
1995
ACM
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
ISCAS
2005
IEEE
15 years 6 months ago
2005
IEEE
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
69
Voted
ICCAD
1996
IEEE
15 years 4 months ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
93
Voted
FPL
2010
Springer
14 years 10 months ago
2010
Springer
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...