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116
Voted
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
15 years 6 months ago
Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Timing Constraints
In this paper we present an approach to the synthesis of fault-tolerant schedules for embedded applications with soft and hard real-time constraints. We are interested to guarante...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
135
Voted
ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
15 years 4 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi
98
Voted
DATE
1997
IEEE
99views Hardware» more  DATE 1997»
15 years 4 months ago
Fast controllers for data dominated applications
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
Andre Hertwig, Hans-Joachim Wunderlich
DATE
2010
IEEE
126views Hardware» more  DATE 2010»
15 years 4 months ago
Scenario-based analysis and synthesis of real-time systems using uppaal
Abstract. We propose an approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-process behaviors of a system are modeled as a set of driving uni...
Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen, S...
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
15 years 2 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung