339 search results - page 36 / 68 » Hardware Synthesis for Multi-Dimensional Time |
125
Voted
FPL
2006
Springer
15 years 4 months ago
2006
Springer
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
108
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ICCAD
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract--We present a methodology for implementing digital signal processing (DSP) operations such as filtering with biomolecular reactions. From a DSP specification, we demonstra...
90
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ICCAD
1998
IEEE
15 years 4 months ago
1998
IEEE
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
118
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FPGA
2004
ACM
15 years 5 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
111
Voted
ISSS
1998
IEEE
15 years 4 months ago
1998
IEEE
False path analysis is an activity with applications in a variety of computer science and engineering domains like for instance high-level synthesis, worst case execution time est...