339 search results - page 40 / 68 » Hardware Synthesis for Multi-Dimensional Time |
96
Voted
ASPDAC
2007
ACM
15 years 4 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
114
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DAC
2007
ACM
16 years 1 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
117
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DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
88
Voted
ASPDAC
2008
ACM
15 years 2 months ago
2008
ACM
In this paper we present a mathematical programming formulation of the integer time budgeting problem for directed acyclic graphs. In particular, we formally prove that our constr...
125
Voted
ISSS
2002
IEEE
15 years 5 months ago
2002
IEEE
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...