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93
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DATE
2010
IEEE
118views Hardware» more  DATE 2010»
14 years 11 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
100
Voted
SAT
2007
Springer
121views Hardware» more  SAT 2007»
15 years 6 months ago
Applying Logic Synthesis for Speeding Up SAT
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
Niklas Eén, Alan Mishchenko, Niklas Sö...
ISPD
2009
ACM
112views Hardware» more  ISPD 2009»
15 years 7 months ago
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
Wan-Ping Lee, Diana Marculescu, Yao-Wen Chang
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
15 years 6 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
90
Voted
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
15 years 6 months ago
Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, Peter K...