339 search results - page 44 / 68 » Hardware Synthesis for Multi-Dimensional Time |
98
Voted
EH
2002
IEEE
15 years 5 months ago
2002
IEEE
: In this paper we focus on a general approach of using genetic algorithm (GA) to evolve Quantum circuits (QC). We propose a generic GA to evolve arbitrary quantum circuit specifie...
107
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ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
In this paper we present an algorithm for converting a BDD representation of a logic function into a multiple-level netlist of disjoint-support subfunctions. On the theoretical si...
102
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EURODAC
1995
IEEE
15 years 4 months ago
1995
IEEE
With VHDL models increasing their size, it becomes more important to assure the quality of these descriptions in order to improve simulation performances, to make project maintain...
ICCAD
2005
IEEE
15 years 9 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...