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» Hardware Synthesis for Multi-Dimensional Time
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127
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DATE
2010
IEEE
154views Hardware» more  DATE 2010»
15 years 1 months ago
Computing robustness of FlexRay schedules to uncertainties in design parameters
Abstract--In the current environment of rapidly changing invehicle requirements and ever-increasing functional content for automotive EE systems, there are several sources of uncer...
Arkadeb Ghosal, Haibo Zeng, Marco Di Natale, Yakov...
101
Voted
DATE
2005
IEEE
144views Hardware» more  DATE 2005»
15 years 6 months ago
Context Sensitive Performance Analysis of Automotive Applications
Accurate timing analysis is key to efficient embedded system synthesis and integration. While industrial control software systems are developed using graphical models, such as Ma...
Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabia...
102
Voted
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
15 years 9 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
SAMOS
2007
Springer
15 years 6 months ago
An Evolutionary Approach to Area-Time Optimization of FPGA designs
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...
Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Paler...
78
Voted
ASAP
2007
IEEE
169views Hardware» more  ASAP 2007»
15 years 6 months ago
Reduced Delay BCD Adder
Financial and commercial applications use decimal data and spend most of their time in decimal arithmetic. Software implementation of decimal arithmetic is typically at least 100 ...
A. A. Bayrakci, A. Akkas