339 search results - page 47 / 68 » Hardware Synthesis for Multi-Dimensional Time |
110
Voted
CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
135
click to vote
CL
2008
Springer
15 years 15 days ago
2008
Springer
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
127
Voted
CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
89
Voted
EURODAC
1994
IEEE
15 years 4 months ago
1994
IEEE
payload. The current recommendations include SDH as the physical layer transmission standard. It is defined the BISDN user network interface (UNI) SDH-based at 155.52 Mbit/s, but t...
104
Voted
ASPDAC
2004
ACM
15 years 5 months ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...