339 search results - page 49 / 68 » Hardware Synthesis for Multi-Dimensional Time |
113
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ISPD
2009
ACM
15 years 7 months ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
104
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ICCAD
2004
IEEE
15 years 9 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
110
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ISQED
2005
IEEE
15 years 6 months ago
2005
IEEE
This paper proposes an efficient automation platform that provides fast and reliable path to analog circuit design for desired specifications. Circuit heuristics and hierarchy a...
81
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ASPDAC
2000
ACM
15 years 4 months ago
2000
ACM
Two compact yet high performance standard cell libraries (CyHP libraries), which contain only 11111111 and 20 cells respectively, are proposed. The first CyHP library leads to 5% i...
MSE
2005
IEEE
15 years 6 months ago
2005
IEEE
A graduate-level computer engineering course sequence at the OGI School of Science and Engineering teaches state-of-the-art digital system design practices and system-on-chip desi...