339 search results - page 53 / 68 » Hardware Synthesis for Multi-Dimensional Time |
CHES
2006
Springer
15 years 4 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
109
click to vote
ISCAS
2007
IEEE
15 years 6 months ago
2007
IEEE
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...
ISCAS
2005
IEEE
15 years 6 months ago
2005
IEEE
In high-level synthesis, accurate lower-bound estimation is helpful to explore the search space efficiently and to evaluate the quality of heuristic algorithms. For the lower-bound...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
— Criticality and yield gradients are two crucial diagnostic metrics obtained from Statistical Static Timing Analysis (SSTA). They provide valuable information to guide timing op...
85
Voted
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
Synchronous Data Flow Graphs (SDFGs) have proved to be a very successful tool for modeling, analysis and synthesis of multimedia applications targeted at both single- and multiproc...