339 search results - page 54 / 68 » Hardware Synthesis for Multi-Dimensional Time |
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
109
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ASPDAC
2010
ACM
14 years 10 months ago
2010
ACM
Modern digital IC designs have a critical operating point, or "wall of slack", that limits voltage scaling. Even with an errortolerance mechanism, scaling voltage below a...
100
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FPL
2000
Springer
15 years 4 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
103
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DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
108
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ICCAD
2009
IEEE
14 years 10 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...