339 search results - page 56 / 68 » Hardware Synthesis for Multi-Dimensional Time |
102
click to vote
FPL
2006
Springer
15 years 4 months ago
2006
Springer
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
113
Voted
ICCAD
2009
IEEE
14 years 10 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
FPL
2003
Springer
15 years 5 months ago
2003
Springer
Abstract. Data dependent circuits are logic circuits specialized to specific input data. They are smaller and faster than the original circuits, although they are not reusable and...
ICCAD
2005
IEEE
15 years 9 months ago
2005
IEEE
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
102
click to vote
ICMCS
2010
IEEE
15 years 1 months ago
2010
IEEE
This paper presents our ongoing research on view synthesis of free-viewpoint 3D multi-view video for 3DTV. With the emerging breakthrough of stereoscopic 3DTV, we have extended a ...