339 search results - page 62 / 68 » Hardware Synthesis for Multi-Dimensional Time |
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
DAC
2006
ACM
16 years 1 months ago
2006
ACM
Traditionally, rectilinear Steiner minimum trees (RSMT) are widely used for routing estimation in design optimizations like floorplanning and physical synthesis. Since it optimize...
107
Voted
ASPDAC
2005
ACM
15 years 6 months ago
2005
ACM
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
118
click to vote
ICCD
2006
IEEE
15 years 9 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
107
Voted
ICCAD
2006
IEEE
15 years 9 months ago
2006
IEEE
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...