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» Hardware Synthesis for Multi-Dimensional Time
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76
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DATE
2007
IEEE
130views Hardware» more  DATE 2007»
15 years 6 months ago
Development of on board, highly flexible, Galileo signal generator ASIC
Alcatel Alenia Space is deeply involved in the Galileo program at many stages. In particular, Alcatel Alenia Space has successfully designed and delivered the very first navigatio...
Louis Baguena, Emmanuel Liégeon, Alexandra ...
DATE
2005
IEEE
152views Hardware» more  DATE 2005»
15 years 6 months ago
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
Fei Su, Krishnendu Chakrabarty
100
Voted
ISPD
2003
ACM
79views Hardware» more  ISPD 2003»
15 years 5 months ago
Floorplanning of pipelined array modules using sequence pairs
Floorplanning individual pipelined array modules of a larger overall die can yield beneficial results. Critical paths in every pipeline stage of a pipelined design are roughly equ...
Matthew Moe, Herman Schmit
85
Voted
ASPDAC
2007
ACM
77views Hardware» more  ASPDAC 2007»
15 years 4 months ago
Hippocrates: First-Do-No-Harm Detailed Placement
Physical synthesis optimizations and engineering change orders typically change the locations of cells, resize cells or add more cells to the design after global placement. Unfort...
Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-J...
85
Voted
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
15 years 6 months ago
A mixed analog-digital hybrid for speech enhancement purposes
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
Benny Sallberg, Mattias Dahl, Henrik Akesson, Ingv...