Sciweavers

339 search results - page 6 / 68
» Hardware Synthesis for Multi-Dimensional Time
Sort
View
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
16 years 22 days ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
ICCAD
2000
IEEE
119views Hardware» more  ICCAD 2000»
15 years 4 months ago
Synthesis of Operation-Centric Hardware Descriptions
Most hardware description frameworks, whether schematic or textual, use cooperating finite state machines (CFSM) as the underlying abstraction. In the CFSM framework, a designer ...
James C. Hoe, Arvind
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 4 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
97
Voted
ISSS
1995
IEEE
104views Hardware» more  ISSS 1995»
15 years 3 months ago
A path-based technique for estimating hardware runtime in HW/SW-cosynthesis
One of the key issues in hardware/software{cosynthesis is precise estimation. The usual local estimation techniques are inadequate for globally optimising compilers and synthesis ...
Jörg Henkel, Rolf Ernst
117
Voted
RTCSA
2006
IEEE
15 years 6 months ago
Hardware-Software Codesign of Multimedia Embedded Systems: the PeaCE
Hardware/software codesign involves various design problems including system specification, design space exploration, hardware/software co-verification, and system synthesis. A co...
Soonhoi Ha, Choonseung Lee, Youngmin Yi, Seongnam ...