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TASLP
2010
95views more  TASLP 2010»
14 years 10 months ago
A Modal-Based Real-Time Piano Synthesizer
—This paper presents a real-time piano synthesizer where both the transverse and longitudinal motion of the string is modeled by modal synthesis, resulting in a coherent and high...
Balázs Bank, Stefano Zambon, Federico Fonta...
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
15 years 4 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
DATE
2000
IEEE
89views Hardware» more  DATE 2000»
15 years 4 months ago
A System-Level Synthesis Algorithm with Guaranteed Solution Quality
Recently a number of heuristic based system-level synthesis algorithms have been proposed. Though these algorithms quickly generate good solutions, how close these solutions are t...
U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Ch...
FPL
2004
Springer
90views Hardware» more  FPL 2004»
15 years 5 months ago
Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis
Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, ...
ICCAD
1992
IEEE
93views Hardware» more  ICCAD 1992»
15 years 4 months ago
Timing analysis in high-level synthesis
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
Andreas Kuehlmann, Reinaldo A. Bergamaschi