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» Hardware Synthesis for Multi-Dimensional Time
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107
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SOSP
1989
ACM
15 years 1 months ago
Threads and Input/Output in the Synthesis Kernel
The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllrol...
Henry Massalin, Calton Pu
87
Voted
EUROMICRO
2002
IEEE
15 years 5 months ago
A Sum of Absolute Differences Implementation in FPGA Hardware
In this paper, we propose a new hardware unit that performs a 16 × 1 SAD operation. The hardware unit is intended to augment a general-purpose core. Further, we show that the 16 ...
Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana
CBSE
2005
Springer
15 years 5 months ago
Real-Time Scheduling Techniques for Implementation Synthesis from Component-Based Software Models
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
Zonghua Gu, Zhimin He
84
Voted
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
15 years 4 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
15 years 4 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling