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SASP
2008
IEEE
183views Hardware» more  SASP 2008»
15 years 6 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
ISSS
1995
IEEE
109views Hardware» more  ISSS 1995»
15 years 3 months ago
1995 high level synthesis design repository
In this paper we brie y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
Preeti Ranjan Panda, Nikil D. Dutt
DATE
2004
IEEE
210views Hardware» more  DATE 2004»
15 years 3 months ago
Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
Emerging embedded system applications in multimedia and image processing are characterized by complex control flow consisting of deeply nested conditionals and loops. We present a...
Sumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru N...
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
15 years 1 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
FPL
1999
Springer
147views Hardware» more  FPL 1999»
15 years 4 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...