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ISCAS
2005
IEEE
143views Hardware» more  ISCAS 2005»
15 years 3 months ago
Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementation
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
Masahide Abe, Hiroki Arai, Masayuki Kawamata
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 1 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
ACSD
2008
IEEE
135views Hardware» more  ACSD 2008»
14 years 11 months ago
Synthesis of Petri nets from infinite partial languages
In this paper we present an algorithm to synthesize a finite unlabeled place/transition Petri net (p/t-net) from a possibly infinite partial language, which is given by a term ove...
Robin Bergenthum, Jörg Desel, Robert Lorenz, ...
IEEEPACT
2006
IEEE
15 years 3 months ago
Hardware support for spin management in overcommitted virtual machines
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
CEC
2008
IEEE
15 years 4 months ago
Evolving GeneChip correlation predictors on parallel graphics hardware
—A GPU is used to datamine five million correlations between probes within Affymetrix HG-U133A probesets across 6685 human tissue samples from NCBI’s GEO database. These conco...
William B. Langdon