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» Hardware Task Scheduling for Partially Reconfigurable FPGAs
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FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
15 years 2 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...
TVLSI
2002
116views more  TVLSI 2002»
14 years 10 months ago
Configuration relocation and defragmentation for run-time reconfigurable computing
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. By mapping the compute-intens...
Katherine Compton, Zhiyuan Li, James Cooley, Steph...
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CODES
2009
IEEE
15 years 2 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
FCCM
2009
IEEE
170views VLSI» more  FCCM 2009»
14 years 8 months ago
Generic Software Framework for Adaptive Applications on FPGAs
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 2 months ago
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
Thilo Streichert