Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz...
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...