101 search results - page 18 / 21 » Hardware Task Scheduling for Partially Reconfigurable FPGAs |
ICCAD
2000
IEEE
15 years 2 months ago
2000
IEEE
Synchronous Data Flow (SDF) is a well-known model of computation that is widely used in the control engineering and digital signal processing domains. Existing scheduling methods ...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
Multitasking on reconfigurable logic can achieve very high silicon reusability. However, configuration latency is a major limitation and it can largely degrade the system performa...
RSP
1999
IEEE
15 years 2 months ago
1999
IEEE
The advances in the programmable hardware has lead to new architectures where the hardware can be dynamically adapted to the application to gain better performance. There are stil...
SIES
2010
IEEE
14 years 8 months ago
2010
IEEE
In this paper we present an approach to increase the fault tolerance in FlexRay networks by introducing backup nodes to replace defect ECUs (Electronic Control Units). In order to ...
100
click to vote
DATE
2004
IEEE
15 years 2 months ago
2004
IEEE
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...