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» Hardware Task Scheduling for Partially Reconfigurable FPGAs
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DATE
2010
IEEE
142views Hardware» more  DATE 2010»
14 years 10 months ago
Transition-aware real-time task scheduling for reconfigurable embedded systems
—Due to increase in demand for reconfigurability in embedded systems, real-time task scheduling is challenged by non-negligible reconfiguration overheads. If such overheads are n...
Hessam Kooti, Elaheh Bozorgzadeh, Shenghui Liao, L...
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DAGSTUHL
2006
14 years 11 months ago
Managing power amongst a group of networked embedded fpgas using dynamic reconfiguration and task migration
Small unpiloted aircraft (UAVs) each have limited power budgets. If a group (swarm) of small UAVs is organised to perform a common task such as geo-location, then it is possible t...
David A. Kearney, Mark Jasiunas
ERSA
2010
186views Hardware» more  ERSA 2010»
14 years 8 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
15 years 10 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
ARC
2007
Springer
120views Hardware» more  ARC 2007»
15 years 2 months ago
Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
Jae Young Hur, Stephan Wong, Stamatis Vassiliadis