Sciweavers

213 search results - page 26 / 43
» Hardware Transactional Memory with Operating System Support,...
Sort
View
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 1 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
SC
2004
ACM
15 years 2 months ago
Performance Evaluation of Task Pools Based on Hardware Synchronization
A task-based execution provides a universal approach to dynamic load balancing for irregular applications. Tasks are arbitrary units of work that are created dynamically at runtim...
Ralf Hoffmann, Matthias Korch, Thomas Rauber
MSS
1999
IEEE
115views Hardware» more  MSS 1999»
15 years 1 months ago
Managing Databases with Binary Large Objects
We present recommendations on Performance Management for databases supporting Binary Large Objects (BLOB) that, under a wide range of conditions, save both storage space and datab...
Michael Shapiro, Ethan L. Miller
ASPLOS
2012
ACM
13 years 5 months ago
Aikido: accelerating shared data dynamic analyses
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
Marek Olszewski, Qin Zhao, David Koh, Jason Ansel,...
EMSOFT
2007
Springer
15 years 3 months ago
The revenge of the overlay: automatic compaction of OS kernel code via on-demand code loading
There is increasing interest in using general-purpose operating systems, such as Linux, on embedded platforms. It is especially important in embedded systems to use memory effici...
Haifeng He, Saumya K. Debray, Gregory R. Andrews