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ICDCS
2008
IEEE
15 years 3 months ago
Strong WORM
We introduce a Write-Once Read-Many (WORM) storage system providing strong assurances of data retention and compliant migration, by leveraging trusted secure hardware in close dat...
Radu Sion
ISCA
2010
IEEE
170views Hardware» more  ISCA 2010»
15 years 2 months ago
Relax: an architectural framework for software recovery of hardware faults
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaral...
HPCA
1996
IEEE
15 years 1 months ago
Protected, User-Level DMA for the SHRIMP Network Interface
Traditional DMA requires the operating system to perform many tasks to initiate a transfer, with overhead on the order of hundreds or thousands of CPU instructions. This paper des...
Matthias A. Blumrich, Cezary Dubnicki, Edward W. F...
CANPC
1999
Springer
15 years 1 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
DATE
2005
IEEE
104views Hardware» more  DATE 2005»
15 years 3 months ago
Queue Management in Network Processors
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...