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ISCA
1999
IEEE
104views Hardware» more  ISCA 1999»
15 years 1 months ago
Is SC + ILP=RC?
Sequential consistency (SC) is the simplest programming interface for shared-memory systems but imposes program order among all memory operations, possibly precluding high perform...
Chris Gniady, Babak Falsafi, T. N. Vijaykumar
MICRO
1997
IEEE
79views Hardware» more  MICRO 1997»
15 years 1 months ago
On High-Bandwidth Data Cache Design for Multi-Issue Processors
Highly aggressive multi-issue processor designs of the past few years and projections for the next decade require that we redesign the operation of the cache memory system. The nu...
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson,...
MICRO
2006
IEEE
135views Hardware» more  MICRO 2006»
15 years 3 months ago
Support for High-Frequency Streaming in CMPs
As the industry moves toward larger-scale chip multiprocessors, the need to parallelize applications grows. High inter-thread communication delays, exacerbated by over-stressed hi...
Ram Rangan, Neil Vachharajani, Adam Stoler, Guilhe...
SENSYS
2006
ACM
15 years 3 months ago
Capsule: an energy-optimized object storage system for memory-constrained sensor devices
Recent gains in energy-efficiency of new-generation NAND flash storage have strengthened the case for in-network storage by data-centric sensor network applications. This paper ...
Gaurav Mathur, Peter Desnoyers, Deepak Ganesan, Pr...
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
15 years 3 months ago
Supporting task migration in multi-processor systems-on-chip: a feasibility study
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
Stefano Bertozzi, Andrea Acquaviva, Davide Bertozz...