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ISPAN
2005
IEEE
15 years 3 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
80
Voted
NOMS
2010
IEEE
163views Communications» more  NOMS 2010»
14 years 8 months ago
DReaM-Cache: Distributed Real-Time Transaction Memory Cache to support two-factor authentication services and its reliability
—PhoneFactor is a two-factor authentication service that combines the knowledge-based authenticator with an objectbased authenticator in which the object-based authenticator has ...
Haiyang Qian, Chandra Sekhar Surapaneni, Marsh Ray...
78
Voted
ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
15 years 4 months ago
Flexible Decoupled Transactional Memory Support
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. ...
CLUSTER
2003
IEEE
15 years 3 months ago
Implications of a PIM Architectural Model for MPI
Memory may be the only system component that is more commoditized than a microprocessor. To simultaneously exploit this and address the impending memory wall, processing in memory...
Arun Rodrigues, Richard C. Murphy, Peter M. Kogge,...
MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
15 years 4 months ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt