286 search results - page 26 / 58 » Hardware acceleration of transactional memory on commodity s... |
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
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ASPLOS
2012
ACM
13 years 5 months ago
2012
ACM
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
FPL
2009
Springer
15 years 1 months ago
2009
Springer
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
HPCA
2000
IEEE
15 years 2 months ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...