286 search results - page 27 / 58 » Hardware acceleration of transactional memory on commodity s... |
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
195
Voted
POPL
2009
ACM
15 years 10 months ago
2009
ACM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
We present HybridOS, a set of operating system extensions for supporting fine-grained reconfigurable accelerators integrated with general-purpose computing platforms. HybridOS spe...
SC
2009
ACM
15 years 4 months ago
2009
ACM
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...