286 search results - page 52 / 58 » Hardware acceleration of transactional memory on commodity s... |
ISCA
2010
IEEE
14 years 11 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
119
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SIGMOD
2011
ACM
14 years 12 days ago
2011
ACM
Advances in hardware have enabled many long-running applications to execute entirely in main memory. As a result, these applications have increasingly turned to database technique...
IEEEPACT
2007
IEEE
15 years 3 months ago
2007
IEEE
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
102
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CODES
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
INFOCOM
2008
IEEE
15 years 4 months ago
2008
IEEE
—Hash tables are extensively used in networking to implement data-structures that associate a set of keys to a set of values, as they provide O(1), query, insert and delete opera...