286 search results - page 6 / 58 » Hardware acceleration of transactional memory on commodity s... |
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
CONEXT
2008
ACM
14 years 11 months ago
2008
ACM
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
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MICRO
2010
IEEE
14 years 4 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
PDP
2006
IEEE
15 years 3 months ago
2006
IEEE
Commodity symmetric multiprocessors (SMPs), though originally intended for transaction processing, because of their availability, are now used for numerical analysis applications ...
ISCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...