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» Hardware code generation from dataflow programs
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ASPLOS
2008
ACM
15 years 3 months ago
Optimistic parallelism benefits from data partitioning
Recent studies of irregular applications such as finite-element mesh generators and data-clustering codes have shown that these applications have a generalized data parallelism ar...
Milind Kulkarni, Keshav Pingali, Ganesh Ramanaraya...
ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
15 years 5 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
DATE
2004
IEEE
175views Hardware» more  DATE 2004»
15 years 5 months ago
Breaking Instance-Independent Symmetries in Exact Graph Coloring
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Kare...
98
Voted
TCAD
2002
98views more  TCAD 2002»
15 years 1 months ago
An Esterel compiler for large control-dominated systems
Embedded hard real-time software systems often need fine-grained parallelism and precise control of timing, things typical real-time operating systems do not provide. The Esterel l...
Stephen A. Edwards
FMICS
2010
Springer
15 years 1 months ago
Correctness of Sensor Network Applications by Software Bounded Model Checking
We investigate the application of the software bounded model checking tool CBMC to the domain of wireless sensor networks (WSNs). We automatically generate a software behavior mode...
Frank Werner, David Faragó