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» Hardware code generation from dataflow programs
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89
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FPL
2007
Springer
99views Hardware» more  FPL 2007»
15 years 1 months ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
14 years 1 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
92
Voted
PEPM
2009
ACM
15 years 6 months ago
Bidirectional data-flow analyses, type-systematically
We show that a wide class of bidirectional data-flow analyses and program optimizations based on them admit declarative descriptions in the form of type systems. The salient feat...
Maria João Frade, Ando Saabas, Tarmo Uustal...
TACO
2008
130views more  TACO 2008»
14 years 9 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
ECMDAFA
2008
Springer
166views Hardware» more  ECMDAFA 2008»
14 years 11 months ago
Towards Roundtrip Engineering - A Template-Based Reverse Engineering Approach
Model driven development suggests to make models the main artifact in software development. To get executable models in most cases code generation to a "traditional" prog...
Manuel Bork, Leif Geiger, Christian Schneider, Alb...