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» Hardware code generation from dataflow programs
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COMPSAC
2002
IEEE
15 years 6 months ago
A Graphically Based Language for Constructing, Executing and Analysing Models of Software Systems
With computer systems becoming ever larger and more complex, the cost and effort associated with their construction is increasing and the systems are now sufficiently complex that...
Robert John Walters
122
Voted
PLDI
1994
ACM
15 years 5 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
ASPLOS
2012
ACM
13 years 9 months ago
Applying transactional memory to concurrency bugs
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchroni...
Haris Volos, Andres Jaan Tack, Michael M. Swift, S...
DASIP
2010
14 years 8 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
GPCE
2004
Springer
15 years 7 months ago
VS-Gen: A Case Study of a Product Line for Versioning Systems
This paper describes our experience with developing a product line for middleware-based versioning systems. We perform a detailed domain analysis and define a DSL for configuring i...
Jernej Kovse, Christian Gebauer