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» Hardware code generation from dataflow programs
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CODES
2005
IEEE
15 years 7 months ago
Rappit: framework for synthesis of host-assisted scripting engines for adaptive embedded systems
Scripting is a powerful, high-level, cross-platform, dynamic, easy way of composing software modules as black boxes. Unfortunately, the high runtime overhead has prevented scripti...
Jiwon Hahn, Qiang Xie, Pai H. Chou
ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
15 years 10 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
15 years 8 months ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
PPOPP
2009
ACM
16 years 2 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
MICRO
1992
IEEE
124views Hardware» more  MICRO 1992»
15 years 5 months ago
A shape matching approach for scheduling fine-grained parallelism
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
Brian A. Malloy, Rajiv Gupta, Mary Lou Soffa