Sciweavers

1077 search results - page 149 / 216
» Hardware code generation from dataflow programs
Sort
View
CODES
2008
IEEE
15 years 8 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
JPDC
2006
95views more  JPDC 2006»
15 years 1 months ago
Speculative pre-execution assisted by compiler (SPEAR)
Speculative pre-execution achieves efficient data prefetching by running additional prefetching threads on spare hardware contexts. Various implementations for speculative pre-exe...
Won Woo Ro, Jean-Luc Gaudiot
EPIA
1999
Springer
15 years 6 months ago
Combinatorial Optimization in OPL Studio
OPL is a modeling language for mathematical programming and combinatorial optimization problems. It is the first modeling language to combine high-level algebraic and set notation...
Pascal Van Hentenryck, Laurent Michel, Philippe La...
IADIS
2004
15 years 3 months ago
OPTIM: An Open Platform for Teaching Interactively with Multimedia
In this paper, we propose an open framework for teachers and lecturers in science, to help them write their pedagogical documents with both static textual parts, and interactive a...
Henri Delebecque
ENTCS
2007
139views more  ENTCS 2007»
15 years 1 months ago
A Change-based Approach to Software Evolution
Software evolution research is limited by the amount of information available to researchers: Current version control tools do not store all the information generated by developer...
Romain Robbes, Michele Lanza