1077 search results - page 156 / 216 » Hardware code generation from dataflow programs |
118
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CODES
2004
IEEE
15 years 5 months ago
2004
IEEE
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
99
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FPL
2001
Springer
15 years 6 months ago
2001
Springer
Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image pr...
134
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ISCAPDCS
2003
15 years 3 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
112
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ASPLOS
2006
ACM
15 years 7 months ago
2006
ACM
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
112
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IEEEPACT
2005
IEEE
15 years 7 months ago
2005
IEEE
Dynamic optimization has the potential to adapt the program’s behavior at run-time to deliver performance improvements over static optimization. Dynamic optimization systems usu...