1077 search results - page 164 / 216 » Hardware code generation from dataflow programs |
119
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HICSS
1995
IEEE
15 years 5 months ago
1995
IEEE
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
101
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MICRO
1998
IEEE
15 years 5 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
111
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USENIX
2008
15 years 4 months ago
2008
Code sandboxing is useful for many purposes, but most sandboxing techniques require kernel modifications, do not completely isolate guest code, or incur substantial performance co...
175
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ISPD
2012
ACM
13 years 9 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
117
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PLDI
2009
ACM
15 years 8 months ago
2009
ACM
Decentralized information flow control (DIFC) is a promising model for writing programs with powerful, end-to-end security guarantees. Current DIFC systems that run on commodity ...