1077 search results - page 165 / 216 » Hardware code generation from dataflow programs |
122
click to vote
IJPP
2011
14 years 5 months ago
2011
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
122
click to vote
CSIE
2009
IEEE
15 years 5 months ago
2009
IEEE
Mobile devices are constrained in terms of computational power, battery lifetime and memory sizes. Software development for mobile devices is further complicated by application co...
115
click to vote
ICRA
2010
IEEE
15 years 4 days ago
2010
IEEE
Abstract— We present an integrated vision and robotic system that plays, and learns to play, simple physically-instantiated board games that are variants of TIC TAC TOE and HEXAP...
86
Voted
MICRO
2000
IEEE
15 years 6 months ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
101
click to vote
ISLPED
1995
ACM
15 years 5 months ago
1995
ACM
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...