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IJPP
2011
115views more  IJPP 2011»
14 years 5 months ago
Milepost GCC: Machine Learning Enabled Self-tuning Compiler
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
Grigori Fursin, Yuriy Kashnikov, Abdul Wahid Memon...
CSIE
2009
IEEE
15 years 5 months ago
An Efficient Mixed-Mode Execution Environment for C on Mobile Phone Platforms
Mobile devices are constrained in terms of computational power, battery lifetime and memory sizes. Software development for mobile devices is further complicated by application co...
Taekhoon Kim, Sungho Kim, Kirak Hong, Hwangho Kim,...
ICRA
2010
IEEE
147views Robotics» more  ICRA 2010»
15 years 4 days ago
Learning physically-instantiated game play through visual observation
Abstract— We present an integrated vision and robotic system that plays, and learns to play, simple physically-instantiated board games that are variants of TIC TAC TOE and HEXAP...
Andrei Barbu, Siddharth Narayanaswamy, Jeffrey Mar...
86
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MICRO
2000
IEEE
80views Hardware» more  MICRO 2000»
15 years 6 months ago
Silent stores for free
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
Kevin M. Lepak, Mikko H. Lipasti
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 5 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels