1077 search results - page 179 / 216 » Hardware code generation from dataflow programs |
107
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SAMOS
2009
Springer
15 years 8 months ago
2009
Springer
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
108
Voted
SAT
2005
Springer
15 years 7 months ago
2005
Springer
The utilization of cutting planes is a key technique in Integer Linear Programming (ILP). However, cutting planes have seldom been applied in Pseudo-Boolean Optimization (PBO) algo...
145
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CL
2008
Springer
15 years 1 months ago
2008
Springer
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
ASPLOS
2010
ACM
15 years 8 months ago
2010
ACM
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
120
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FCCM
2004
IEEE
15 years 5 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...