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» Hardware code generation from dataflow programs
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DFT
2003
IEEE
64views VLSI» more  DFT 2003»
15 years 7 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
121
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ASPLOS
2009
ACM
15 years 6 months ago
Efficient online validation with delta execution
Software systems are constantly changing. Patches to fix bugs and patches to add features are all too common. Every change risks breaking a previously working system. Hence admini...
Joseph Tucek, Weiwei Xiong, Yuanyuan Zhou
CASES
2009
ACM
15 years 8 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...
115
Voted
DIGRA
2005
Springer
15 years 7 months ago
Interactive Story Writing in the Classroom: Using Computer Games
Interactive story writing is a new medium for creative expression. The story “writer” uses a computer game (such as BioWare’s Neverwinter Nights) to create an interactive st...
Jonathan Schaeffer, Mike Carbonaro, Duane Szafron,...
143
Voted
GECCO
2004
Springer
160views Optimization» more  GECCO 2004»
15 years 7 months ago
Finding Effective Software Metrics to Classify Maintainability Using a Parallel Genetic Algorithm
The ability to predict the quality of a software object can be viewed as a classification problem, where software metrics are the features and expert quality rankings the class lab...
Rodrigo A. Vivanco, Nicolino J. Pizzi